Energy Efficient 4-2 and 5-2 Compressor for Arithmetic Circuits
Rahul Mani Upadhyay, R.K. Chauhan and Manish Kumar
Low power demand of electronics industry and communication systems are driven by technology scaling and marketing. Compressors are the most often used modules in the architecture of an Arithmetic Circuits. Compressor is the basic combinational digital logic circuit for performing numerous arithmetic operations. The design criterion in any Compressor circuit involves the XOR-XNOR and multiplexer circuits. It is a prominent component in the designing of integrated circuit that performs arithmetic operations. The proposed Compressor is design in order to reduce the transistor count which results in curtailing power dissipation and delay. The performance parameter are recorded and tabulated. This compressor has less delay and low power dissipation. The temperature effect has also shown a linear change in power dissipation in lower temperature ranges which shows the robustness of the proposed circuits. The proposed compressor can be used in numerous applications such as multiplier, DSP microprocessor and data processing systems.
Keywords: XOR-XNOR gates, Multiplexer, Power Dissipation, Delay, Power-Delay product