A Novel DSP Structure with Multiple Stack Pointers
Bo Ye and Min Luo
To improve operational efficiency of traditional DSP, a novel DSP structure with multiple stack pointers is presented in this paper. Currently a stack pointer is included in various DSP cores and its operations include push, pop and short addressing etc. However, for multiple-memory access applications and systems which require even-alignment, only one stack pointer will result in inefficiency and inconvenience. In the new DSP structure proposed with this paper, several scratch pointers are included, and each pointer indicates a bank of memory area different from the stack. The new methodology can improve the efficiency of parallel instructions, simplify subroutine interfaces, achieve even-alignment and re-entry easily, as well as manage temporary variables in each subroutine dynamically. Besides, the operations of the scratch pointer are very simple, and they only involve addition and subtraction operations. A brief discussion of advantages over several possible software solutions is presented. A 32-bit DSP test chip is fabricated in 130 nm CMOS technology and measured to demonstrate the instruction efficiency of the proposed structure.
Keywords: DSP core, Stack pointer, Even-aligned, Parallel instruction